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1/11 february 2004 std150nh02l n-channel 24v - 0.003 ? - 150a clippak?/ipak stripfet? iii power mosfet typical r ds (on) = 0.003 ? @ 10 v typical r ds (on) = 0.005 ? @ 5 v r ds(on) * qg industry?s benchmark conduction losses reduced switching losses reduced low threshold device through-hole ipak (to-251) power package in tube (suffix ?-1") surface-mounting power package in tape & reel (suffix ?t4?) description the std150nh02l utilizes the latest advanced design rules of st?s proprietary stripfet? technology. this novel 0.6 process utilizes also unique metallization techniques that couple to a "bondless" assembly technique result in outstanding performance with standard dpak outline. it is therefore ideal in high performance dc-dc converter applications where efficiency it to be achieved at very high out currents. applications specifically designed and optimised for high efficiency dc/dc convertes ordering information type v dss r ds(on) i d std150nh02l 24 v < 0.0035 ? 150 a sales type marking package packaging std150nh02lt4 d150nh02l clippak tape & reel STD150NH02L-1 d150nh02l to-251 tube clippak ? (suffix ?t4?) 3 2 1 1 3 ipak to-251 (suffix ?-1?) absolute maximum ratings symbol parameter value unit v spike(1) drain-source voltage rating 30 v v ds drain-source voltage (v gs = 0) 24 v v dgr drain-gate voltage (r gs = 20 k ? ) 24 v v gs gate- source voltage 20 v i d drain current (continuous) at t c = 25c 150 a i d drain current (continuous) at t c = 100c 107 a i dm (2) drain current (pulsed) 600 a p tot total dissipation at t c = 25c 125 w derating factor 0.83 w/c e as (3) single pulse avalanche energy 500 mj t stg storage temperature -55 to 175 c t j max. operating junction temperature internal schematic diagram
std150nh02l 2/11 thermal data electrical characteristics (t case = 25 c unless otherwise specified) off on (4 ) dynamic rthj-case rthj-amb t l thermal resistance junction-case thermal resistance junction-ambient maximum lead temperature for soldering purpose max max 1.2 100 275 c/w c/w c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 25 ma, v gs = 0 24 v i dss zero gate voltage drain current (v gs = 0) v ds = 20 v v ds = 20 v t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 11.8 v r ds(on) static drain-source on resistance v gs = 10 v i d = 75 a v gs = 5 v i d = 37.5 a 0.003 0.004 0.0035 0.0065 ? ? symbol parameter test conditions min. typ. max. unit g fs (4) forward transconductance v ds = 10 v i d =75 a 60 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 15v f = 1 mhz v gs = 0 4450 1126 141 pf pf pf r g gate input resistance f = 1 mhz gate dc bias = 0 test signal level = 20 mv open drain 1.6 ?
3/11 std150nh02l switching on switching off source drain diode (1) garanted when external rg=4.7 ? and t f < t fmax . (4) pulsed: pulse duration = 300 s, duty cycle 1.5 %. (2) pulse width limited by safe operating area (5) q oss = c oss * ? v in , c oss = c gd + c ds . see appendix a ( 3 ) starting t j = 25 o c, i d = 75a, v dd = 10v (6) gate charge for synchronous operation . . symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 10 v i d = 75 a r g =4.7 ? v gs = 10 v (resistive load, figure 3) 14 224 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 16v i d = 150a v gs = 10 v 69 13 9 93 nc nc nc q oss (5) output charge v ds = 16 v v gs = 0 v 27 nc q gls (6) third-quadrant gate charge v ds < 0 v v gs = 10 v 64 nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 10 v i d = 75 a r g =4.7 ?, v gs = 10 v (resistive load, figure 3) 69 40 54 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm source-drain current source-drain current (pulsed) 150 600 a a v sd (4) forward on voltage i sd = 75 a v gs = 0 1.15 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 150 a di/dt = 100a/s v dd = 15 v t j = 150c (see test circuit, figure 5) 47 58 2.5 ns nc a electrical characteristics (continued) safe operating area thermal impedance
std150nh02l 4/11 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/11 std150nh02l normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics normalized breakdown voltage vs temperature . .
std150nh02l 6/11 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
7/11 std150nh02l dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a3 0.7 1.3 0.027 0.051 b 0.64 0.9 0.025 0.031 b2 5.2 5.4 0.204 0.212 b3 0.85 0.033 b5 0.3 0.012 b6 0.95 0.037 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 15.9 16.3 0.626 0.641 l 9 9.4 0.354 0.370 l1 0.8 1.2 0.031 0.047 l2 0.8 1 0.031 0.039 a c2 c a3 h a1 d l l2 l1 1 3 = = b3 b b6 b2 e g = = = = b5 2 to-251 (ipak) mechanical data 0068771-e
std150nh02l 8/11 dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.64 0.9 0.025 0.035 b2 5.2 5.4 0.204 0.212 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 9.35 10.1 0.368 0.397 l2 0.8 0.031 l4 0.6 1 0.023 0.039 == d l2 l4 1 3 == b e == b2 g 2 a c2 c h a1 detail "a" a2 detail "a" to-252 (dpak) mechanical data 0068772-b
9/11 std150nh02l
std150nh02l 10/11
11/11 std150nh02l i nformation furnished is believed to be accurate and reliable. ho wever, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subje ct t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are n ot a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners. ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco -singapore - spain - sweden - switzerland - united kingdom - united states. www.st.com

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